Capacitance sensors are used to implement a variety of useful functions including touch sensors (e.g., touch pad, touch dial, touch wheel, etc.), determining the presence of an object, accelerometers, and other functions. FIG. 1A illustrates a conventional capacitance measurement circuit 100 including a relaxation oscillator, a reference clock, and a frequency comparator. The relaxation oscillator is coupled to drive a charging current (IC) in a single direction onto a device under test (“DUT”) capacitor. As the charging current accumulates charge on the DUT capacitor, the voltage across the capacitor increases with time as a function of IC and its capacitance C. Equation 1 describes the relation between current, capacitance, voltage and time for a charging capacitor.CdV=ICdt  (Equation 1)
The relaxation oscillator begins by charging the DUT capacitor from a ground potential or zero voltage and continues to accumulate charge on the DUT capacitor at a fixed charging current IC until the voltage across the DUT capacitor reaches a reference voltage (Vref). At Vref, the relaxation oscillator allows the accumulated charge to discharge or the DUT capacitor to “relax” back to the ground potential and then the process repeats itself. The relaxation oscillator outputs a relaxation oscillator clock signal (RO CLK) having a frequency (fRO) dependent upon capacitance C of the DUT capacitor, charging current IC, a discharge time td, and Vref, as described in equation 2 below.
                              f          RO                =                              (                                          C                ·                                                      V                    ⁢                                                                                  ⁢                    ref                                                        I                    C                                                              +                              t                d                                      )                                -            1                                              (                  Equation          ⁢                                          ⁢          2                )            
If capacitance C of the DUT capacitor changes, then fRO will change proportionally according to equation 2. By comparing fRO of RO CLK against the frequency (fREF) of a known reference clock signal (REF CLK), the change in capacitance ΔC can be measured. Accordingly, equations 3 and 4 below describe that a change in frequency between RO CLK and REF CLK is proportional to a change in capacitance of the DUT capacitor.ΔC∝Δf, where  (Equation 3)Δf=fRO−fREF.  (Equation 4)
The frequency comparator is coupled to receive RO CLK and REF CLK, compare their frequencies fRO and fREF, respectively, and output a signal indicative of the difference Δf between these frequencies. By monitoring Δf one can determine whether the capacitance of the DUT capacitor has changed.
FIG. 1B illustrates another capacitance sensing technique using a charge transfer mechanism. FIG. 1B illustrates a conventional capacitance measurement circuit 101 including three switches 105 with control terminals φ0, φ1, and φ2, and summing capacitor 110 having a capacitance CSUM, and an analog to digital (“ADC”) converter 115. Capacitance measurement circuit 101 may be used to sense changes in a DUT capacitor 120 having a changing capacitance CDUT.
During operation, capacitance measurement circuit 101 operates as follows to sense capacitance changes on DUT capacitor 120. First, summing capacitor 110 is discharged to a ground potential by asserting control terminal φ0 to open circuit switch SW0 and by asserting control terminal φ1 to close circuit switch SW1. Once discharged to ground, integrating capacitor 110 is disconnected from ground by asserting φ1 to open switch SW1. Then, DUT capacitor 120 is charged to the supply voltage VS by asserting φ0 to open circuit switch SW0 and asserting φ2 to close circuit switch SW2. Once DUT capacitor 120 charges to the supply voltage VS, the charge on DUT capacitor 120 is transferred onto summing capacitor 110 and distributed between the two capacitors. Charge transfer occurs by asserting φ1 and φ2 to open circuit switches SW1 and SW2, respectively, and asserting φ0 to close circuit switch SW0.
The above stages of charging DUT capacitor 120 and transferring the charge onto summing capacitor 110 are repeated a fixed number times causing the voltages of nodes N1 and N2 to ramp with time as illustrated in line graphs 130 and 135, respectively. After a fixed number of consecutive charging stages and charge transferring stages, ADC converter 115 samples the final voltage on node N2. The capacitance CDUT is determined based on the output of ADC converter 115 and is proportional to the voltage at node N2 after the final charge transfer stage.
Because the capacitance deviation of a capacitance sense switch due to a finger press is small compared to the underlying capacitance of the switch itself, the above two capacitance sensing techniques can be susceptible to external noise, interference, or other environmental factors. For example, parasitic capacitances may couple to the user interface, electromagnetic interference (“EMI”) may disrupt capacitance measurements and control signals, deviations in operating temperature can cause thermal expansions and dielectric variations that affect capacitance measurements, user error can result in malfunctions, and so forth. These environmental factors can often result in disruptive capacitance deviations that are larger than the capacitance changes induced by a finger interaction with the capacitance sense interface. Accordingly, a reliable capacitance sense interface and control system should account for some or all of these sources of noise.